author = "Bioul, G."
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High-speed FPGA 10's complement adders-subtractors

Description: This paper first presents a study on the classical BCD adders from which a carry-chain type adder is redesigned to fit within the Xilinx FPGA's platforms. Some new concepts are presented to compute the P and G functions for carry-chain optimization purposes. Several alternative designs are presented...
Language(s): Inglés
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